|
|
Ph.D. student, Nanoelectronics research group, Department of Informatics, University of Oslo hansbe(at)ifi.uio.no |
Hans Kristian Otnes Berge
I have a M.Sc. in Microelectronics (2005) I completed my Master Thesis entitled "An AER Analog VLSI Cochlea using Pseudo Floating Gate Transistors". From the 1st of November 2005 I joined as a researchassistant on the CAVIAR project, which my supervisor for the master thesis Philipp Häfliger was involved in. From the 1st of June until the 31st of August I worked on readout electronics for a permanentely implanted piezoresistive sensor, for Ola Sveen. From September 1st I have been employed as a senior engineer (no. overingeniør) by the Microelectronics Systems Group at the University of Oslo, Institute of Informatics. I work here with technical software support and installation, technical programming, as a research assistant and I also help out with courses as a lab assistant and "oracle" for students.
This web-page is currently under (re-)construction. For more information than these pages (will) supply, please contact me.
Projects of the present
| Ph.D. in the field ultra-low voltage / ultra-low power digital CMOS. | |
Projects of the past
| Master Thesis | Title: An AER Analog Silicon Cochlea Model using Pseudo Floating Gate Transconductors. A powerpoint presentation. The cochlea is the biological hearing organ. My master thesis looks into the use of Pseudo-Floating Gate (PFG) Inverters to create a micropower VLSI cochlea model. The Pseudo-Floating Gate Inverters are single-ended inverting transconductors with a tunable gm and using these a cascade of second-order low-pass filters with tunable Q and cut-off is put together. The biasing technique that was used when implementing the PFG's did not work, although it may work with different processes. We have later had success with the use of gate-leakage for programming the threshold of the PFG's. |
| CAVIAR (Serial AER) |
The EU-funded CAVIAR project for its last seven months, hired me as a research assistant for Philipp Hafliger. CAVIAR is an acronym for Convolution Address-Event-Representation (AER) Vision Architecture for Real-Time. I worked on synthesis of logic for AER communication mostly with serial communication of Address Events, in an effort to boost transmission speed by using LVDS techniques. A test was made with a commercial FPGA and our effective maximum was 41.66Mevents/sec with 16bits/event (666Mbps) on the serial link. The transmission rate could be optimized further in our serial link but we did not pursue it as we had no means of recording events at speeds above around 4Mevents/sec. Theoretically speeds may be boosted beyond this: Max baud for new IP-cores is 6.25Gbps per LVDS channel, with some FPGAs having up to 20 channels allowing for 125Gbps or 100Gbps if we assume a 20% overhead on the data encoding. |
| Implanted Pressure Sensor Readout Electronics | For the summer term I was employed by Ola Sveen, involved in the engineering of a implanted electronic circuit capable of reading out a piezoresistive pressure sensor. Although an ASIC solution for this is the most likely way to make it I created a large-scale prototype with proprietary IC's. It consisted of a pre-amplifier, a low power ADC, microcontroller and energy transfer system using coils with a radius of about 2cm. The prototype worked, but the pressure resolution it achieved (18mBar) was about 4 bits off the target. The project resulted in valuable experience to create a more miniaturized read-out circuit. |
| Ultrasound preamplifier | After getting a custom order I used a week to make a simple Ultrasound preamplifier: Fixed +20dB Gain, Bandwidth from about 10kHz to 200kHz. I even delivered it with a metal box and batteries. |
| Gepic Evolution of Art |
Inspired by the fantastic Art engine which produce some fantastic pictures you can see at steike.com (made by another guy and a friend of mine, Kyrre Glette), I set out to make a Art engine of myself using Genetic Programming Techniques. The results are'nt bad. Check it out at The Gepic Page |